2.4GHz_ANT GND LoRA_MOSI LoRa_MISO LoRA_RST LoRa_BUSY GPIO3 ADC1_CH3 GPIO2 ADC1_CH2 GPIO1 ADC1_CH1 GPIO0 ADC1_CH0 EN LoRa ANT GND TXD GPIO21 RXD GPIO20 GPIO19 USB_D+ GPIO18 USB_D- LoRA_NSS GPIO9 LoRa_SCK GND VDD 09-10-25 Rainer Wieland HT-CT62 Breakout LoRa 2.4GHz <b>Pin Header Connectors</b><p> <author>Created by librarian@cadsoft.de</author> <b>PIN HEADER</b> >NAME >VALUE PIN HEADER <b>EAGLE Design Rules</b> <p> Die Standard-Design-Rules sind so gewählt, dass sie für die meisten Anwendungen passen. Sollte ihre Platine besondere Anforderungen haben, treffen Sie die erforderlichen Einstellungen hier und speichern die Design Rules unter einem neuen Namen ab. <b>EAGLE Design Rules</b> <p> The default Design Rules have been set to cover a wide range of applications. Your particular design may have different requirements, so please make the necessary adjustments and save your customized design rules under a new name. Since Version 8.2, EAGLE supports online libraries. The ids of those online libraries will not be understood (or retained) with this version. Since Version 8.3, EAGLE supports Fusion synchronisation. This feature will not be available in this version and saving the document will break the link to the Fusion PCB feature. Since Version 8.3, EAGLE supports URNs for individual library assets (packages, symbols, and devices). The URNs of those assets will not be understood (or retained) with this version. Since Version 8.3, EAGLE supports the association of 3D packages with devices in libraries, schematics, and board files. Those 3D packages will not be understood (or retained) with this version. Since Version 9.4, EAGLE supports the overriding of 3D packages in schematics and board files. Those overridden 3d packages will not be understood (or retained) with this version.